2015-05-13 04:38:29 +03:00
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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2016-11-24 22:42:32 +03:00
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#include <array>
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2015-06-21 15:12:49 +03:00
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#include <cstddef>
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2016-06-27 20:42:42 +03:00
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#include <string>
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2018-01-27 18:16:39 +03:00
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#include <tuple>
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#include <boost/icl/interval_map.hpp>
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2015-05-13 04:38:29 +03:00
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#include "common/common_types.h"
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#include "core/memory_hook.h"
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#include "video_core/memory_manager.h"
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2017-09-27 01:27:44 +03:00
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namespace Kernel {
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class Process;
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}
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namespace Memory {
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2015-05-13 05:38:56 +03:00
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/**
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* Page size used by the ARM architecture. This is the smallest granularity with which memory can
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* be mapped.
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*/
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2018-02-13 00:53:32 +03:00
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constexpr size_t PAGE_BITS = 12;
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constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
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constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
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constexpr size_t ADDRESS_SPACE_BITS = 36;
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constexpr size_t PAGE_TABLE_NUM_ENTRIES = 1ULL << (ADDRESS_SPACE_BITS - PAGE_BITS);
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enum class PageType : u8 {
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/// Page is unmapped and should cause an access error.
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Unmapped,
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/// Page is mapped to regular memory. This is the only type you can get pointers to.
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Memory,
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/// Page is mapped to regular memory, but also needs to check for rasterizer cache flushing and
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/// invalidation
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RasterizerCachedMemory,
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/// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
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Special,
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};
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struct SpecialRegion {
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enum class Type {
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DebugHook,
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IODevice,
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} type;
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MemoryHookPointer handler;
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bool operator<(const SpecialRegion& other) const {
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return std::tie(type, handler) < std::tie(other.type, other.handler);
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}
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bool operator==(const SpecialRegion& other) const {
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return std::tie(type, handler) == std::tie(other.type, other.handler);
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}
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};
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/**
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* A (reasonably) fast way of allowing switchable and remappable process address spaces. It loosely
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* mimics the way a real CPU page table works.
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*/
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struct PageTable {
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/**
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* Array of memory pointers backing each page. An entry can only be non-null if the
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* corresponding entry in the `attributes` array is of type `Memory`.
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*/
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std::array<u8*, PAGE_TABLE_NUM_ENTRIES> pointers;
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/**
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* Contains MMIO handlers that back memory regions whose entries in the `attribute` array is of
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* type `Special`.
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*/
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boost::icl::interval_map<VAddr, std::set<SpecialRegion>> special_regions;
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/**
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* Array of fine grained page attributes. If it is set to any value other than `Memory`, then
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* the corresponding entry in `pointers` MUST be set to null.
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*/
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std::array<PageType, PAGE_TABLE_NUM_ENTRIES> attributes;
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};
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/// Virtual user-space memory regions
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enum : VAddr {
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/// Where the application text, data and bss reside.
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PROCESS_IMAGE_VADDR = 0x08000000,
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PROCESS_IMAGE_MAX_SIZE = 0x08000000,
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PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
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/// Read-only page containing kernel and system configuration values.
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CONFIG_MEMORY_VADDR = 0x1FF80000,
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CONFIG_MEMORY_SIZE = 0x00001000,
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CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
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/// Usually read-only page containing mostly values read from hardware.
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SHARED_PAGE_VADDR = 0x1FF81000,
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SHARED_PAGE_SIZE = 0x00001000,
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SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
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/// Area where TLS (Thread-Local Storage) buffers are allocated.
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TLS_AREA_VADDR = 0x40000000,
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TLS_ENTRY_SIZE = 0x200,
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TLS_AREA_SIZE = 0x10000000,
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TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
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/// Application stack
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STACK_AREA_VADDR = TLS_AREA_VADDR_END,
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STACK_AREA_SIZE = 0x10000000,
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STACK_AREA_VADDR_END = STACK_AREA_VADDR + STACK_AREA_SIZE,
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DEFAULT_STACK_SIZE = 0x100000,
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/// Application heap
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/// Size is confirmed to be a static value on fw 3.0.0
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HEAP_VADDR = 0x108000000,
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HEAP_SIZE = 0x180000000,
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HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
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/// New map region
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/// Size is confirmed to be a static value on fw 3.0.0
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NEW_MAP_REGION_VADDR = HEAP_VADDR_END,
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NEW_MAP_REGION_SIZE = 0x80000000,
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NEW_MAP_REGION_VADDR_END = NEW_MAP_REGION_VADDR + NEW_MAP_REGION_SIZE,
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/// Map region
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/// Size is confirmed to be a static value on fw 3.0.0
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MAP_REGION_VADDR = NEW_MAP_REGION_VADDR_END,
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MAP_REGION_SIZE = 0x1000000000,
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MAP_REGION_VADDR_END = MAP_REGION_VADDR + MAP_REGION_SIZE,
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/// Kernel Virtual Address Range
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KERNEL_REGION_VADDR = 0xFFFFFF8000000000,
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KERNEL_REGION_SIZE = 0x7FFFE00000,
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KERNEL_REGION_END = KERNEL_REGION_VADDR + KERNEL_REGION_SIZE,
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};
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/// Currently active page table
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void SetCurrentPageTable(PageTable* page_table);
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PageTable* GetCurrentPageTable();
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/// Determines if the given VAddr is valid for the specified process.
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bool IsValidVirtualAddress(const Kernel::Process& process, VAddr vaddr);
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bool IsValidVirtualAddress(VAddr addr);
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/// Determines if the given VAddr is a kernel address
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bool IsKernelVirtualAddress(VAddr addr);
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u8 Read8(VAddr addr);
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u16 Read16(VAddr addr);
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u32 Read32(VAddr addr);
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u64 Read64(VAddr addr);
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void Write8(VAddr addr, u8 data);
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void Write16(VAddr addr, u16 data);
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void Write32(VAddr addr, u32 data);
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void Write64(VAddr addr, u64 data);
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void ReadBlock(const Kernel::Process& process, VAddr src_addr, void* dest_buffer, size_t size);
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void ReadBlock(VAddr src_addr, void* dest_buffer, size_t size);
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void WriteBlock(const Kernel::Process& process, VAddr dest_addr, const void* src_buffer,
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size_t size);
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void WriteBlock(VAddr dest_addr, const void* src_buffer, size_t size);
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void ZeroBlock(VAddr dest_addr, size_t size);
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void CopyBlock(VAddr dest_addr, VAddr src_addr, size_t size);
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u8* GetPointer(VAddr virtual_address);
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std::string ReadCString(VAddr virtual_address, std::size_t max_length);
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enum class FlushMode {
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/// Write back modified surfaces to RAM
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Flush,
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/// Remove region from the cache
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Invalidate,
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/// Write back modified surfaces to RAM, and also remove them from the cache
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FlushAndInvalidate,
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};
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2018-03-25 05:21:14 +03:00
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/**
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* Mark each page touching the region as cached.
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*/
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void RasterizerMarkRegionCached(Tegra::GPUVAddr start, u64 size, bool cached);
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2018-03-23 05:56:41 +03:00
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/**
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* Flushes and invalidates any externally cached rasterizer resources touching the given virtual
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* address region.
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*/
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void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode);
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} // namespace Memory
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