nvdec cleanup
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83227ad981
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ac265a72ce
@ -28,8 +28,14 @@ NvResult nvhost_vic::Ioctl1(Ioctl command, const std::vector<u8>& input, std::ve
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return GetWaitbase(input, output);
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return GetWaitbase(input, output);
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case 0x9:
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case 0x9:
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return MapBuffer(input, output);
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return MapBuffer(input, output);
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case 0xa:
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case 0xa: {
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if (command.length == 0x1c) {
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Tegra::ChCommandHeaderList cmdlist(1);
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cmdlist[0] = Tegra::ChCommandHeader{0xDEADB33F};
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system.GPU().PushCommandBuffer(cmdlist);
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}
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return UnmapBuffer(input, output);
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return UnmapBuffer(input, output);
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}
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default:
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default:
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break;
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break;
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}
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}
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@ -37,20 +37,7 @@ CDmaPusher::CDmaPusher(GPU& gpu_)
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CDmaPusher::~CDmaPusher() = default;
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CDmaPusher::~CDmaPusher() = default;
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void CDmaPusher::Push(ChCommandHeaderList&& entries) {
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void CDmaPusher::ProcessEntries(ChCommandHeaderList&& entries) {
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cdma_queue.push(std::move(entries));
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}
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void CDmaPusher::DispatchCalls() {
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while (!cdma_queue.empty()) {
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Step();
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}
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}
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void CDmaPusher::Step() {
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const auto entries{cdma_queue.front()};
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cdma_queue.pop();
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std::vector<u32> values(entries.size());
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std::vector<u32> values(entries.size());
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std::memcpy(values.data(), entries.data(), entries.size() * sizeof(u32));
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std::memcpy(values.data(), entries.data(), entries.size() * sizeof(u32));
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@ -99,19 +99,13 @@ public:
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explicit CDmaPusher(GPU& gpu_);
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explicit CDmaPusher(GPU& gpu_);
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~CDmaPusher();
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~CDmaPusher();
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/// Push NVDEC command buffer entries into queue
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/// Process the command entry
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void Push(ChCommandHeaderList&& entries);
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void ProcessEntries(ChCommandHeaderList&& entries);
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/// Process queued command buffer entries
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void DispatchCalls();
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/// Process one queue element
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void Step();
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private:
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/// Invoke command class devices to execute the command based on the current state
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/// Invoke command class devices to execute the command based on the current state
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void ExecuteCommand(u32 state_offset, u32 data);
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void ExecuteCommand(u32 state_offset, u32 data);
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private:
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/// Write arguments value to the ThiRegisters member at the specified offset
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/// Write arguments value to the ThiRegisters member at the specified offset
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void ThiStateWrite(ThiRegisters& state, u32 state_offset, const std::vector<u32>& arguments);
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void ThiStateWrite(ThiRegisters& state, u32 state_offset, const std::vector<u32>& arguments);
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@ -128,9 +122,6 @@ private:
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s32 offset{};
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s32 offset{};
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u32 mask{};
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u32 mask{};
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bool incrementing{};
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bool incrementing{};
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// Queue of command lists to be processed
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std::queue<ChCommandHeaderList> cdma_queue;
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};
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};
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} // namespace Tegra
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} // namespace Tegra
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@ -44,9 +44,11 @@ Codec::~Codec() {
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}
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}
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void Codec::SetTargetCodec(NvdecCommon::VideoCodec codec) {
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void Codec::SetTargetCodec(NvdecCommon::VideoCodec codec) {
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LOG_INFO(Service_NVDRV, "NVDEC video codec initialized to {}", codec);
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if (current_codec != codec) {
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LOG_INFO(Service_NVDRV, "NVDEC video codec initialized to {}", static_cast<u32>(codec));
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current_codec = codec;
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current_codec = codec;
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}
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}
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}
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void Codec::StateWrite(u32 offset, u64 arguments) {
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void Codec::StateWrite(u32 offset, u64 arguments) {
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u8* const state_offset = reinterpret_cast<u8*>(&state) + offset * sizeof(u64);
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u8* const state_offset = reinterpret_cast<u8*>(&state) + offset * sizeof(u64);
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@ -55,7 +57,6 @@ void Codec::StateWrite(u32 offset, u64 arguments) {
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void Codec::Decode() {
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void Codec::Decode() {
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bool is_first_frame = false;
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bool is_first_frame = false;
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if (!initialized) {
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if (!initialized) {
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if (current_codec == NvdecCommon::VideoCodec::H264) {
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if (current_codec == NvdecCommon::VideoCodec::H264) {
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av_codec = avcodec_find_decoder(AV_CODEC_ID_H264);
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av_codec = avcodec_find_decoder(AV_CODEC_ID_H264);
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@ -18,7 +18,10 @@ extern "C" {
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namespace Tegra {
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namespace Tegra {
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Vic::Vic(GPU& gpu_, std::shared_ptr<Nvdec> nvdec_processor_)
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Vic::Vic(GPU& gpu_, std::shared_ptr<Nvdec> nvdec_processor_)
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: gpu(gpu_), nvdec_processor(std::move(nvdec_processor_)) {}
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: gpu(gpu_),
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nvdec_processor(std::move(nvdec_processor_)), converted_frame_buffer{nullptr, av_free}
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{}
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Vic::~Vic() = default;
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Vic::~Vic() = default;
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void Vic::VicStateWrite(u32 offset, u32 arguments) {
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void Vic::VicStateWrite(u32 offset, u32 arguments) {
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@ -89,8 +92,10 @@ void Vic::Execute() {
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// Get Converted frame
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// Get Converted frame
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const std::size_t linear_size = frame->width * frame->height * 4;
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const std::size_t linear_size = frame->width * frame->height * 4;
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using AVMallocPtr = std::unique_ptr<u8, decltype(&av_free)>;
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// Only allocate frame_buffer once per stream, as the size is not expected to change
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AVMallocPtr converted_frame_buffer{static_cast<u8*>(av_malloc(linear_size)), av_free};
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if (!converted_frame_buffer) {
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converted_frame_buffer = AVMallocPtr{static_cast<u8*>(av_malloc(linear_size)), av_free};
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}
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const int converted_stride{frame->width * 4};
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const int converted_stride{frame->width * 4};
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u8* const converted_frame_buf_addr{converted_frame_buffer.get()};
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u8* const converted_frame_buf_addr{converted_frame_buffer.get()};
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@ -104,12 +109,12 @@ void Vic::Execute() {
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const u32 block_height = static_cast<u32>(config.block_linear_height_log2);
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const u32 block_height = static_cast<u32>(config.block_linear_height_log2);
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const auto size = Tegra::Texture::CalculateSize(true, 4, frame->width, frame->height, 1,
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const auto size = Tegra::Texture::CalculateSize(true, 4, frame->width, frame->height, 1,
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block_height, 0);
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block_height, 0);
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std::vector<u8> swizzled_data(size);
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luma_buffer.resize(size);
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Tegra::Texture::SwizzleSubrect(frame->width, frame->height, frame->width * 4,
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Tegra::Texture::SwizzleSubrect(frame->width, frame->height, frame->width * 4,
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frame->width, 4, swizzled_data.data(),
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frame->width, 4, luma_buffer.data(),
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converted_frame_buffer.get(), block_height, 0, 0);
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converted_frame_buffer.get(), block_height, 0, 0);
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, swizzled_data.data(), size);
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(), size);
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} else {
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} else {
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// send pitch linear frame
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// send pitch linear frame
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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gpu.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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@ -132,8 +137,8 @@ void Vic::Execute() {
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const auto stride = frame->linesize[0];
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const auto stride = frame->linesize[0];
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const auto half_stride = frame->linesize[1];
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const auto half_stride = frame->linesize[1];
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std::vector<u8> luma_buffer(aligned_width * surface_height);
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luma_buffer.resize(aligned_width * surface_height);
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std::vector<u8> chroma_buffer(aligned_width * half_height);
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chroma_buffer.resize(aligned_width * half_height);
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// Populate luma buffer
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// Populate luma buffer
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for (std::size_t y = 0; y < surface_height - 1; ++y) {
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for (std::size_t y = 0; y < surface_height - 1; ++y) {
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@ -97,6 +97,13 @@ private:
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GPU& gpu;
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GPU& gpu;
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std::shared_ptr<Tegra::Nvdec> nvdec_processor;
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std::shared_ptr<Tegra::Nvdec> nvdec_processor;
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/// Avoid reallocation of the following buffers every frame, as their
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/// size does not change during a stream
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using AVMallocPtr = std::unique_ptr<u8, decltype(&av_free)>;
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AVMallocPtr converted_frame_buffer;
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std::vector<u8> luma_buffer;
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std::vector<u8> chroma_buffer;
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GPUVAddr config_struct_address{};
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GPUVAddr config_struct_address{};
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GPUVAddr output_surface_luma_address{};
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GPUVAddr output_surface_luma_address{};
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GPUVAddr output_surface_chroma_u_address{};
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GPUVAddr output_surface_chroma_u_address{};
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@ -30,8 +30,7 @@ MICROPROFILE_DEFINE(GPU_wait, "GPU", "Wait for the GPU", MP_RGB(128, 128, 192));
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GPU::GPU(Core::System& system_, bool is_async_, bool use_nvdec_)
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GPU::GPU(Core::System& system_, bool is_async_, bool use_nvdec_)
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: system{system_}, memory_manager{std::make_unique<Tegra::MemoryManager>(system)},
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: system{system_}, memory_manager{std::make_unique<Tegra::MemoryManager>(system)},
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dma_pusher{std::make_unique<Tegra::DmaPusher>(system, *this)},
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dma_pusher{std::make_unique<Tegra::DmaPusher>(system, *this)}, use_nvdec{use_nvdec_},
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cdma_pusher{std::make_unique<Tegra::CDmaPusher>(*this)}, use_nvdec{use_nvdec_},
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maxwell_3d{std::make_unique<Engines::Maxwell3D>(system, *memory_manager)},
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maxwell_3d{std::make_unique<Engines::Maxwell3D>(system, *memory_manager)},
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fermi_2d{std::make_unique<Engines::Fermi2D>()},
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fermi_2d{std::make_unique<Engines::Fermi2D>()},
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kepler_compute{std::make_unique<Engines::KeplerCompute>(system, *memory_manager)},
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kepler_compute{std::make_unique<Engines::KeplerCompute>(system, *memory_manager)},
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@ -48,9 +48,8 @@ static void RunThread(Core::System& system, VideoCore::RendererBase& renderer,
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dma_pusher.DispatchCalls();
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dma_pusher.DispatchCalls();
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} else if (auto* command_list = std::get_if<SubmitChCommandEntries>(&next.data)) {
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} else if (auto* command_list = std::get_if<SubmitChCommandEntries>(&next.data)) {
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// NVDEC
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// NVDEC
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cdma_pusher.Push(std::move(command_list->entries));
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cdma_pusher.ProcessEntries(std::move(command_list->entries));
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cdma_pusher.DispatchCalls();
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} else if (const auto data = std::get_if<SwapBuffersCommand>(&next.data)) {
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} else if (const auto* data = std::get_if<SwapBuffersCommand>(&next.data)) {
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renderer.SwapBuffers(data->framebuffer ? &*data->framebuffer : nullptr);
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renderer.SwapBuffers(data->framebuffer ? &*data->framebuffer : nullptr);
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} else if (std::holds_alternative<OnCommandListEndCommand>(next.data)) {
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} else if (std::holds_alternative<OnCommandListEndCommand>(next.data)) {
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rasterizer->ReleaseFences();
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rasterizer->ReleaseFences();
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