Correct XMAD mode, psl and high_b on different encodings.
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@ -1238,13 +1238,16 @@ union Instruction {
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union {
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union {
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BitField<20, 16, u64> imm20_16;
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BitField<20, 16, u64> imm20_16;
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BitField<35, 1, u64> high_b_rr; // used on RR
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BitField<36, 1, u64> product_shift_left;
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BitField<36, 1, u64> product_shift_left;
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BitField<37, 1, u64> merge_37;
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BitField<37, 1, u64> merge_37;
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BitField<48, 1, u64> sign_a;
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BitField<48, 1, u64> sign_a;
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BitField<49, 1, u64> sign_b;
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BitField<49, 1, u64> sign_b;
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BitField<50, 2, XmadMode> mode_cbf; // used by CR, RC
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BitField<50, 3, XmadMode> mode;
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BitField<50, 3, XmadMode> mode;
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BitField<52, 1, u64> high_b;
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BitField<52, 1, u64> high_b;
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BitField<53, 1, u64> high_a;
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BitField<53, 1, u64> high_a;
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BitField<55, 1, u64> product_shift_left_second; // used on CR
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BitField<56, 1, u64> merge_56;
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BitField<56, 1, u64> merge_56;
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} xmad;
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} xmad;
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@ -29,39 +29,55 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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const bool is_signed_b = instr.xmad.sign_b == 1;
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const bool is_signed_b = instr.xmad.sign_b == 1;
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const bool is_signed_c = is_signed_a;
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const bool is_signed_c = is_signed_a;
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auto [is_merge, op_b, op_c] = [&]() -> std::tuple<bool, Node, Node> {
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auto [is_merge, is_psl, is_high_b, mode, op_b,
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op_c] = [&]() -> std::tuple<bool, bool, bool, Tegra::Shader::XmadMode, Node, Node> {
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switch (opcode->get().GetId()) {
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switch (opcode->get().GetId()) {
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case OpCode::Id::XMAD_CR:
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case OpCode::Id::XMAD_CR:
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return {instr.xmad.merge_56,
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return {instr.xmad.merge_56,
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instr.xmad.product_shift_left_second,
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instr.xmad.high_b,
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instr.xmad.mode_cbf,
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
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GetRegister(instr.gpr39)};
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GetRegister(instr.gpr39)};
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case OpCode::Id::XMAD_RR:
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case OpCode::Id::XMAD_RR:
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return {instr.xmad.merge_37, GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
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return {instr.xmad.merge_37, instr.xmad.product_shift_left, instr.xmad.high_b_rr,
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instr.xmad.mode, GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
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case OpCode::Id::XMAD_RC:
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case OpCode::Id::XMAD_RC:
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return {false, GetRegister(instr.gpr39),
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return {false,
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false,
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instr.xmad.high_b,
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instr.xmad.mode_cbf,
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GetRegister(instr.gpr39),
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
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case OpCode::Id::XMAD_IMM:
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case OpCode::Id::XMAD_IMM:
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return {instr.xmad.merge_37, Immediate(static_cast<u32>(instr.xmad.imm20_16)),
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return {instr.xmad.merge_37,
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instr.xmad.product_shift_left,
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false,
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instr.xmad.mode,
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Immediate(static_cast<u32>(instr.xmad.imm20_16)),
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GetRegister(instr.gpr39)};
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GetRegister(instr.gpr39)};
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}
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}
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UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName());
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UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName());
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return {false, Immediate(0), Immediate(0)};
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return {false, false, false, Tegra::Shader::XmadMode::None, Immediate(0), Immediate(0)};
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}();
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}();
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op_a = BitfieldExtract(op_a, instr.xmad.high_a ? 16 : 0, 16);
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op_a = BitfieldExtract(op_a, instr.xmad.high_a ? 16 : 0, 16);
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const Node original_b = op_b;
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const Node original_b = op_b;
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op_b = BitfieldExtract(op_b, instr.xmad.high_b ? 16 : 0, 16);
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op_b = BitfieldExtract(op_b, is_high_b ? 16 : 0, 16);
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// TODO(Rodrigo): Use an appropiate sign for this operation
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// TODO(Rodrigo): Use an appropiate sign for this operation
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Node product = Operation(OperationCode::IMul, NO_PRECISE, op_a, op_b);
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Node product = Operation(OperationCode::IMul, NO_PRECISE, op_a, op_b);
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if (instr.xmad.product_shift_left) {
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if (is_psl) {
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product = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, product, Immediate(16));
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product = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, product, Immediate(16));
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}
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}
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SetTemporal(bb, 0, product);
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product = GetTemporal(0);
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const Node original_c = op_c;
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const Node original_c = op_c;
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const Tegra::Shader::XmadMode set_mode = mode; // Workaround to clang compile error
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op_c = [&]() {
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op_c = [&]() {
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switch (instr.xmad.mode) {
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switch (set_mode) {
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case Tegra::Shader::XmadMode::None:
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case Tegra::Shader::XmadMode::None:
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return original_c;
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return original_c;
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case Tegra::Shader::XmadMode::CLo:
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case Tegra::Shader::XmadMode::CLo:
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@ -80,8 +96,13 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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}
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}
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}();
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}();
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SetTemporal(bb, 1, op_c);
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op_c = GetTemporal(1);
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// TODO(Rodrigo): Use an appropiate sign for this operation
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// TODO(Rodrigo): Use an appropiate sign for this operation
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Node sum = Operation(OperationCode::IAdd, product, op_c);
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Node sum = Operation(OperationCode::IAdd, product, op_c);
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SetTemporal(bb, 2, sum);
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sum = GetTemporal(2);
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if (is_merge) {
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if (is_merge) {
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const Node a = BitfieldExtract(sum, 0, 16);
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const Node a = BitfieldExtract(sum, 0, 16);
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const Node b =
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const Node b =
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@ -95,4 +116,4 @@ u32 ShaderIR::DecodeXmad(NodeBlock& bb, u32 pc) {
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return pc;
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return pc;
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}
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}
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} // namespace VideoCommon::Shader
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} // namespace VideoCommon::Shader
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