2015-05-13 04:38:29 +03:00
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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2015-06-21 15:12:49 +03:00
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#include <cstddef>
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2016-06-27 20:42:42 +03:00
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#include <string>
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2015-05-13 04:38:29 +03:00
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#include "common/common_types.h"
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2019-03-02 23:20:28 +03:00
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namespace Common {
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struct PageTable;
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}
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2015-05-13 04:38:29 +03:00
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2017-09-27 01:27:44 +03:00
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namespace Kernel {
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class Process;
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}
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2015-05-13 04:38:29 +03:00
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namespace Memory {
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2015-05-13 05:38:56 +03:00
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/**
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* Page size used by the ARM architecture. This is the smallest granularity with which memory can
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* be mapped.
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*/
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2018-09-15 16:21:06 +03:00
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constexpr std::size_t PAGE_BITS = 12;
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2018-09-24 17:29:56 +03:00
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constexpr u64 PAGE_SIZE = 1ULL << PAGE_BITS;
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2018-02-13 00:53:32 +03:00
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constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
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2015-05-13 04:38:29 +03:00
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/// Virtual user-space memory regions
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enum : VAddr {
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2018-09-25 03:01:45 +03:00
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/// TLS (Thread-Local Storage) related.
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2018-03-15 05:06:57 +03:00
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TLS_ENTRY_SIZE = 0x200,
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/// Application stack
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2018-03-31 22:03:28 +03:00
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DEFAULT_STACK_SIZE = 0x100000,
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2018-03-15 05:06:57 +03:00
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2018-06-22 09:47:59 +03:00
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/// Kernel Virtual Address Range
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KERNEL_REGION_VADDR = 0xFFFFFF8000000000,
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KERNEL_REGION_SIZE = 0x7FFFE00000,
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KERNEL_REGION_END = KERNEL_REGION_VADDR + KERNEL_REGION_SIZE,
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2015-05-13 04:38:29 +03:00
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};
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core/cpu_core_manager: Create threads separately from initialization.
Our initialization process is a little wonky than one would expect when
it comes to code flow. We initialize the CPU last, as opposed to
hardware, where the CPU obviously needs to be first, otherwise nothing
else would work, and we have code that adds checks to get around this.
For example, in the page table setting code, we check to see if the
system is turned on before we even notify the CPU instances of a page
table switch. This results in dead code (at the moment), because the
only time a page table switch will occur is when the system is *not*
running, preventing the emulated CPU instances from being notified of a
page table switch in a convenient manner (technically the code path
could be taken, but we don't emulate the process creation svc handlers
yet).
This moves the threads creation into its own member function of the core
manager and restores a little order (and predictability) to our
initialization process.
Previously, in the multi-threaded cases, we'd kick off several threads
before even the main kernel process was created and ready to execute (gross!).
Now the initialization process is like so:
Initialization:
1. Timers
2. CPU
3. Kernel
4. Filesystem stuff (kind of gross, but can be amended trivially)
5. Applet stuff (ditto in terms of being kind of gross)
6. Main process (will be moved into the loading step in a following
change)
7. Telemetry (this should be initialized last in the future).
8. Services (4 and 5 should ideally be alongside this).
9. GDB (gross. Uses namespace scope state. Needs to be refactored into a
class or booted altogether).
10. Renderer
11. GPU (will also have its threads created in a separate step in a
following change).
Which... isn't *ideal* per-se, however getting rid of the wonky
intertwining of CPU state initialization out of this mix gets rid of
most of the footguns when it comes to our initialization process.
2019-04-09 20:25:54 +03:00
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/// Changes the currently active page table to that of
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/// the given process instance.
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void SetCurrentPageTable(Kernel::Process& process);
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2017-07-22 05:17:57 +03:00
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2017-09-27 01:27:44 +03:00
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/// Determines if the given VAddr is valid for the specified process.
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2018-08-06 04:31:56 +03:00
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bool IsValidVirtualAddress(const Kernel::Process& process, VAddr vaddr);
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bool IsValidVirtualAddress(VAddr vaddr);
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2018-06-22 09:47:59 +03:00
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/// Determines if the given VAddr is a kernel address
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bool IsKernelVirtualAddress(VAddr vaddr);
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2017-09-27 01:27:44 +03:00
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2015-05-13 04:38:29 +03:00
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u8 Read8(VAddr addr);
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u16 Read16(VAddr addr);
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u32 Read32(VAddr addr);
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u64 Read64(VAddr addr);
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void Write8(VAddr addr, u8 data);
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void Write16(VAddr addr, u16 data);
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void Write32(VAddr addr, u32 data);
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void Write64(VAddr addr, u64 data);
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2018-09-15 16:21:06 +03:00
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void ReadBlock(const Kernel::Process& process, VAddr src_addr, void* dest_buffer, std::size_t size);
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void ReadBlock(VAddr src_addr, void* dest_buffer, std::size_t size);
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void WriteBlock(const Kernel::Process& process, VAddr dest_addr, const void* src_buffer,
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std::size_t size);
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void WriteBlock(VAddr dest_addr, const void* src_buffer, std::size_t size);
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void ZeroBlock(const Kernel::Process& process, VAddr dest_addr, std::size_t size);
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void CopyBlock(VAddr dest_addr, VAddr src_addr, std::size_t size);
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2015-05-13 04:38:29 +03:00
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2018-08-06 04:36:44 +03:00
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u8* GetPointer(VAddr vaddr);
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2015-05-13 04:38:29 +03:00
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2018-08-06 04:36:44 +03:00
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std::string ReadCString(VAddr vaddr, std::size_t max_length);
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2016-06-27 20:42:42 +03:00
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2018-03-23 05:56:41 +03:00
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enum class FlushMode {
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/// Write back modified surfaces to RAM
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Flush,
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/// Remove region from the cache
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Invalidate,
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/// Write back modified surfaces to RAM, and also remove them from the cache
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FlushAndInvalidate,
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};
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2018-03-25 05:21:14 +03:00
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/**
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* Mark each page touching the region as cached.
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*/
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2018-08-28 04:35:15 +03:00
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void RasterizerMarkRegionCached(VAddr vaddr, u64 size, bool cached);
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2018-03-25 05:21:14 +03:00
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2017-07-22 05:17:57 +03:00
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} // namespace Memory
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