2014-04-26 09:47:52 +04:00
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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2014-05-02 03:21:04 +04:00
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#include "core/hle/coprocessor.h"
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2014-04-26 09:47:52 +04:00
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#include "core/hle/hle.h"
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#include "core/mem_map.h"
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#include "core/core.h"
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2014-04-26 01:15:19 +04:00
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namespace HLE {
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2014-04-26 09:47:52 +04:00
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enum {
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CMD_GX_REQUEST_DMA = 0x00000000,
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};
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/// Data synchronization barrier
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u32 DataSynchronizationBarrier(u32* command_buffer) {
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u32 command = command_buffer[0];
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switch (command) {
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case CMD_GX_REQUEST_DMA:
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{
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u32* src = (u32*)Memory::GetPointer(command_buffer[1]);
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u32* dst = (u32*)Memory::GetPointer(command_buffer[2]);
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u32 size = command_buffer[3];
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memcpy(dst, src, size);
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}
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break;
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default:
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ERROR_LOG(OSHLE, "MRC::DataSynchronizationBarrier unknown command 0x%08X", command);
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return -1;
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}
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return 0;
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}
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2014-04-26 01:15:19 +04:00
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/// Returns the coprocessor (in this case, syscore) command buffer pointer
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2014-04-26 09:47:52 +04:00
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Addr GetThreadCommandBuffer() {
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2014-04-26 01:15:19 +04:00
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// Called on insruction: mrc p15, 0, r0, c13, c0, 3
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// Returns an address in OSHLE memory for the CPU to read/write to
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RETURN(CMD_BUFFER_ADDR);
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return CMD_BUFFER_ADDR;
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}
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/// Call an MRC operation in HLE
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u32 CallMRC(ARM11_MRC_OPERATION operation) {
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switch (operation) {
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case DATA_SYNCHRONIZATION_BARRIER:
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2014-04-26 09:47:52 +04:00
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return DataSynchronizationBarrier((u32*)Memory::GetPointer(PARAM(0)));
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2014-04-26 01:15:19 +04:00
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case CALL_GET_THREAD_COMMAND_BUFFER:
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2014-04-26 09:47:52 +04:00
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return GetThreadCommandBuffer();
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2014-04-26 01:15:19 +04:00
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default:
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2014-04-26 09:47:52 +04:00
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ERROR_LOG(OSHLE, "unimplemented MRC operation 0x%02X", operation);
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2014-04-26 01:15:19 +04:00
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break;
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}
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return -1;
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}
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} // namespace
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