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159 lines
4.8 KiB
C
159 lines
4.8 KiB
C
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// Copyright 2012 The Chromium Authors
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#ifndef BASE_CPU_H_
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#define BASE_CPU_H_
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#include <string>
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#include "base/base_export.h"
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#include "build/build_config.h"
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namespace base {
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#if defined(ARCH_CPU_X86_FAMILY)
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namespace internal {
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struct X86ModelInfo {
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int family;
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int model;
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int ext_family;
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int ext_model;
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};
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// Compute the CPU family and model based on the vendor and CPUID signature.
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BASE_EXPORT X86ModelInfo ComputeX86FamilyAndModel(const std::string& vendor,
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int signature);
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} // namespace internal
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#endif // defined(ARCH_CPU_X86_FAMILY)
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// Query information about the processor.
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class BASE_EXPORT CPU final {
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public:
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CPU();
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CPU(CPU&&);
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CPU(const CPU&) = delete;
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// Get a preallocated instance of CPU.
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// This can be used in very early application startup. The instance of CPU is
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// created without branding, see CPU(bool requires_branding) for details and
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// implications.
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static const CPU& GetInstanceNoAllocation();
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enum IntelMicroArchitecture {
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PENTIUM = 0,
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SSE = 1,
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SSE2 = 2,
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SSE3 = 3,
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SSSE3 = 4,
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SSE41 = 5,
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SSE42 = 6,
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AVX = 7,
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AVX2 = 8,
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FMA3 = 9,
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MAX_INTEL_MICRO_ARCHITECTURE = 10
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};
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// Accessors for CPU information.
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const std::string& vendor_name() const { return cpu_vendor_; }
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int signature() const { return signature_; }
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int stepping() const { return stepping_; }
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int model() const { return model_; }
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int family() const { return family_; }
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int type() const { return type_; }
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int extended_model() const { return ext_model_; }
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int extended_family() const { return ext_family_; }
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bool has_mmx() const { return has_mmx_; }
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bool has_sse() const { return has_sse_; }
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bool has_sse2() const { return has_sse2_; }
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bool has_sse3() const { return has_sse3_; }
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bool has_ssse3() const { return has_ssse3_; }
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bool has_sse41() const { return has_sse41_; }
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bool has_sse42() const { return has_sse42_; }
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bool has_popcnt() const { return has_popcnt_; }
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bool has_avx() const { return has_avx_; }
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bool has_fma3() const { return has_fma3_; }
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bool has_avx2() const { return has_avx2_; }
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bool has_aesni() const { return has_aesni_; }
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bool has_non_stop_time_stamp_counter() const {
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return has_non_stop_time_stamp_counter_;
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}
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bool is_running_in_vm() const { return is_running_in_vm_; }
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#if defined(ARCH_CPU_ARM_FAMILY)
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// The cpuinfo values for ARM cores are from the MIDR_EL1 register, a
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// bitfield whose format is described in the core-specific manuals. E.g.,
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// ARM Cortex-A57:
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// https://developer.arm.com/documentation/ddi0488/h/system-control/aarch64-register-descriptions/main-id-register--el1.
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uint8_t implementer() const { return implementer_; }
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uint32_t part_number() const { return part_number_; }
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#endif
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// Armv8.5-A extensions for control flow and memory safety.
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#if defined(ARCH_CPU_ARM_FAMILY)
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bool has_mte() const { return has_mte_; }
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bool has_bti() const { return has_bti_; }
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#else
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constexpr bool has_mte() const { return false; }
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constexpr bool has_bti() const { return false; }
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#endif
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#if defined(ARCH_CPU_X86_FAMILY)
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// Memory protection key support for user-mode pages
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bool has_pku() const { return has_pku_; }
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#else
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constexpr bool has_pku() const { return false; }
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#endif
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#if defined(ARCH_CPU_X86_FAMILY)
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IntelMicroArchitecture GetIntelMicroArchitecture() const;
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#endif
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const std::string& cpu_brand() const { return cpu_brand_; }
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private:
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// Query the processor for CPUID information.
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void Initialize(bool requires_branding);
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explicit CPU(bool requires_branding);
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int signature_ = 0; // raw form of type, family, model, and stepping
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int type_ = 0; // process type
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int family_ = 0; // family of the processor
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int model_ = 0; // model of processor
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int stepping_ = 0; // processor revision number
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int ext_model_ = 0;
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int ext_family_ = 0;
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#if defined(ARCH_CPU_ARM_FAMILY)
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uint32_t part_number_ = 0; // ARM MIDR part number
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uint8_t implementer_ = 0; // ARM MIDR implementer identifier
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#endif
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bool has_mmx_ = false;
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bool has_sse_ = false;
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bool has_sse2_ = false;
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bool has_sse3_ = false;
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bool has_ssse3_ = false;
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bool has_sse41_ = false;
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bool has_sse42_ = false;
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bool has_popcnt_ = false;
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bool has_avx_ = false;
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bool has_fma3_ = false;
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bool has_avx2_ = false;
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bool has_aesni_ = false;
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#if defined(ARCH_CPU_ARM_FAMILY)
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bool has_mte_ = false; // Armv8.5-A MTE (Memory Taggging Extension)
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bool has_bti_ = false; // Armv8.5-A BTI (Branch Target Identification)
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#endif
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#if defined(ARCH_CPU_X86_FAMILY)
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bool has_pku_ = false;
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#endif
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bool has_non_stop_time_stamp_counter_ = false;
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bool is_running_in_vm_ = false;
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std::string cpu_vendor_ = "unknown";
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std::string cpu_brand_;
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};
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} // namespace base
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#endif // BASE_CPU_H_
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